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脈沖

The Model 4200-PIV-A Pulse I-V Option combines the Model 4205-PG2 Dual-channel Pulse Generator with the Model 4200-SCP2 Oscilloscope, a specialized interconnect, and patent-pending software to provide a turnkey pulse I-V solution. The software controls sourcing from the pulse generator and data acquisition from the digital oscilloscope to automate a variety of pulse I-V tests. The Model 4200-SCSs proven interface handles instrument setup and control, as well as data storage and presentation. The innovative software provides both cable compensation and load-line compensation, producing DC-like I-V transistor curves, such as VDS - ID family of curves and VGS - ID for voltage threshold extraction. This solution provides pulse I-V testing to address charge trapping problems for high k gate structures, and to eliminate self-heating issues in devices such as high power transistors and advanced CMOS on SOI technology. The specialized interconnect solves most of the problems typically encountered in high speed pulse testing:

Combining pulse and DC sources to a single DUT pin permits both DC and pulse characterization without the need for re-cabling or switching

Impedance matching, which minimizes reflection and maintains pulse fidelity

Easy setup as a result of straightforward cabling and connection to the DUT

The pulse I-V package provides an easy-to-understand solution right out of the box, and offers access to the pulse generator and scope for general purpose pulse and scope applications.

應用

Pulse I-V for leading-edge CMOS devices:

Pulse voltage on gate, DC bias on drain

Measure drain current and gate pulse

±5V pulses for the gate (40ns to 150ns), ±200V DC for the drain

Included tests:

VDS - ID: Both pulse and DC

VGS - ID: Both pulse and DC

Single-pulse scope view: Useful for setup validation, PW optimization, and prototyping of novel pulse tests